Jasur Hanbaba is an adjunct faculty for ECE department and an engineering manager at Intel Manufacturing and Product Engineering organization currently leading an ATE test software readiness project. He has created and co-taught courses in post-silicon validation and embedded systems for the past few years. Prior to his current position, Jasur worked as an FPGA based tester development engineer and before that, as a process development engineer in advanced design group on 22nm &14nm products. Jay joined Intel as a rotation engineer as part of a recent college graduate development program.
Research Interest and Expertise
- Post-Silicon High Volume Manufacturing Product Development
Courses Taught
- ECE 172 Digital Systems
- ECE 510 Post-Silicon Functional Validation
- ECE 544 Embedded System Design & Programmable Logic